Support Files for Peaberry SDR V1

[AE9RB]

[AE9RB]

19-JAN-2013

• Upgraded project to build with PSoC Creator 2.2 and the 96kHz frequency stability mysteriously improved on some radios. Nothing in the Cypress release notes explains why.

07-JAN-2013

• Added 96000 Hz sampling rate.
• Tuned PCM3060 output levels.

13-NOV-2012

• Calibration is less confusing. The Si570 registers are recalculated when the calibration is changed.
• I/Q channel reversing for the transmitter. See: https://github.com/AE9RB/peaberry/wiki/Channel-Reversal
• Local oscillator tunes down to 120kHz. I don't have filters designed for 600m and 1750m, but the radio is prepared for this.
• More sensitivity on 20m.
• 4kHz noise completely eliminated. This was coming from CPU interrupts which have been replaced with Verilog.
• Better timing for narrow FSK protocols like MEPT_JT(WSPR) and JT65.

15-AUG-2012

• Initial release.

Source code is on GitHib.

Firmware can be loaded using any JTAG or SWD programming tool that supports Cypress PSoC 3. I use a Cypress MiniProg3. Settings for the programmer application are: SWD, 5V, RESET, and 10-pin. Be sure to disable clearing of EEPROM if you don't want your calibration erased.